#include <avr/signal.h>
#include <avr/io.h>
#include <avr/wdt.h>
#include <avr/interrupt.h>  /* for sei() */
#include <util/delay.h>     /* for _delay_ms() */

void Writetoreg (int);
void ReadData(char);

void USART_vInit(void);
void USART_vSendByte(char u8Data);
unsigned char USART_Receive( void );

#define DDR_SPI DDRB
#define SPI_SS PINB2
#define SPI_MOSI PINB3
#define SPI_MISO PINB4
#define SPI_SCK PINB5 


#define NUM_SAMPLES 50 /* change the number of data samples */
#define MAX_REG_LENGTH 3 /* this says that the max length of a register is 3 bytes */
char store[NUM_SAMPLES*MAX_REG_LENGTH + 30];

int cur;

int main()
{
	// Allow interrupts
	sei();
	
    USART_vInit();
	
    USART_Receive();

	int a;
	cur=0;
	
	for(a=0;a<NUM_SAMPLES;a++)
	{
		store[a]=13;//dummy data for testing
	}
	
	/* Set MOSI,~SS and SCK output, all others input */
	DDRB = (1<<PINB3)|(1<<PINB5)|(1<<PINB2);
	
	PORTB|=_BV(SPI_SS); /* make the /CS line high */
	
	
	Writetoreg(0x27); /* set the channel AIN6/AIN6 and set the next operation as write to the filter high register */
	Writetoreg(0x4f); /* set Bipolar mode, 24 bits, boost off, all 4 MSBs of filterword to 1 */
	Writetoreg(0x37); /* set the next operation as a write to the filter low register */
	Writetoreg(0xA0); /* max filter word allowed for low part of the filterword */
	Writetoreg(0x17); /* set the operation as a write to the mode register */
	Writetoreg(0x20); /* set gain to 1, burnout current off, no filter sync, and do a self calibration */

	while(((PINC<<4)>>7)==1);  /* wait for /DRDY to go low */
	a=0;
	
	for(a=0;a<NUM_SAMPLES;a++)
	{
		Writetoreg(0x5f); /*set the next operation for 24 bit read from the data register */
		ReadData(3);
	}
	
	for(a=0;a<NUM_SAMPLES;a++)
	{
		USART_vSendByte(store[a]);
	}
	
}


void Writetoreg(int byteword)
{
	int q;

	/* Enable SPI, Master, set clock rate fck/128, set clock polarity and rising */
	SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1)|(1<<CPOL)|(1<<CPHA);

	q = SPSR;
	q = SPDR; /* the read of the staus register and of the data register is needed to clear the interrupt which tells the user that the data transfer is complete */
	PORTB&=~_BV(SPI_SS);  /* /CS is low */
	SPDR = byteword; /* put the byte into data register */
	
	while(!(SPSR & (1<<SPIF))); /* wait for transmission complete */
	
	PORTB|=_BV(SPI_SS);  /* /CS is high */
	
	q = SPSR;
	q = SPDR; /* the read of the staus register and of the data register is needed to clear the interrupt which tells the user that the data transfer is complete */
}


void ReadData(char reglength)
{
    int q;
	
	/* Enable SPI, Master, set clock rate fck/128, set clock polarity and rising */
	SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1)|(1<<CPOL)|(1<<CPHA);
	
	while(((PINC<<4)>>7)==1);  /* wait for /DRDY to go low */
	
	PORTB&=~_BV(SPI_SS);  /* /CS is low */
	
	char b;
	for(b=0;b<reglength;b++)
	{
		SPDR = 0;
		while(!(SPSR & (1<<SPIF)));  /* wait until port ready before reading */
		q = SPSR;
		store[cur]=SPDR; /* read SPDR into store array via datapointer */
		cur++;
	}
		
	PORTB|=_BV(SPI_SS);  /* /CS is high */

}



/*************************************************************************************************/
/****************************************** USART ************************************************/
/*************************************************************************************************/

// Define baud rate
#define USART_BAUD 9600ul
#define USART_UBBR_VALUE ((F_CPU/(USART_BAUD<<4))-1)

void USART_vInit(void)
{
	// Set baud rate/
	UBRRH = (uint8_t)(USART_UBBR_VALUE>>8);
	UBRRL = (uint8_t)USART_UBBR_VALUE;
	/* Set frame format: 8data, 2stop bit */
        UCSRC = (1<<URSEL)|(1<<USBS)|(3<<UCSZ0);
	// Enable receiver and transmitter
	UCSRB = (1<<RXEN)|(1<<TXEN); 
}



void USART_vSendByte(char u8Data)
{
	/* Wait for empty transmit buffer */
	while ( !( UCSRA & (1<<UDRE)) )
	;
	/* Put data into buffer, sends the data */
	UDR = u8Data; 
}


unsigned char USART_Receive( void )
{
	/* Wait for data to be received */
	while ( !(UCSRA & (1<<RXC)) )
	;
	/* Get and return received data from buffer */
	return UDR;
}